Results

Public Available Publications

Please have a look at the iPlat - Wiki which is periodically updated with latest public available project content.

Technical Reports

[T1]
Innovative Plattformen: Anforderungen und Auswahl, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2016
[T2]
Getting started with GIT, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2016
[T3]
Functional specification for a safety related Demonstrator, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2016
[T4]
Design specification for a safety related Demonstrator, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2016
[T5]
Project Report - Feedback 1, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2017
[T6]
Project Report - Feedback 2, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2018
[T7]
Project Report - Feedback 3, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2018
[T8]
Project Report - Feedback 4, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2018
[T9]
User guide for a safety related Demonstrator, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2017
[T10]
Gender Mainstreaming and Diversity Management Report, Technical Report, University of Applied Sciences Technikum Wien, Research Group Embedded Systems, Department of Electronic Engineering, 2017

Papers

[P1]
Peter Roessler, Roland Hoeller, Christopher Reisner, Felix Schroen and Ekaterina Ewers, A Model Railway based Demonstrator for Saftey-Critical Systems, 12th European Workshop on Microelectronics Education (EWME) 2018, Braunschweig, Germany, Sept. 24-26, 2018, 6 pages

Bachelor & Master Theses

[B1]
Anna-Maria Adaktylos, Gender and Diversity management in the iPLAT project, Bachelor Thesis, FH Technikum Wien, June 2016
[B2]
Michael Krenn, Python Framework to Visualize Simulations of Railway Systems, Bachelor Thesis, FH Technikum Wien, June 2017
[B3]
Siavash Vaziri, Innovative Platforms for Mixed Hardware/Software Systems - Safety & Security, Bachelor Thesis, FH Technikum Wien, Februar 2017
[B4]
Siavash Vaziri, Basys3 Periphery Test Design, Bachelor Thesis, FH Technikum Wien, June 2017
[B5]
Nadine Muick, Architectural Concepts of Modern FPGA-SoCs, Bachelor Thesis, FH Technikum Wien, March 2017
[B6]
Nadine Muick, Development of an FPGA based Music-Player, Bachelor Thesis, FH Technikum Wien, November 2017
[B7]
Marius Lingfeld, Weather Station Concept for an Innovative HW/SW Platform, Bachelor Thesis, FH Technikum Wien, January 2018
[B8]
Stefan Werner, Design Evaluation for a System on Chip based Implementation of a Datalogger, Bachelor Thesis, FH Technikum Wien, January 2018
[B9]
Patrick Graf, Design Consideration and Specification of a SoC based Weather Station, Bachelor Thesis, FH Technikum Wien, Februar 2018
[B10]
Christoph Klinger, Numeral Calculator Concept for an Innovative HW/SW Platform, Bachelor Thesis, FH Technikum Wien, Februar 2018
[B11]
Marius Lingfeld, Implementierung einer Wetterstation auf einer innovativen HW/SW-Plattform, Bachelor Thesis, FH Technikum Wien, June 2018
[B12]
Stefan Werner, Implementierung eines Datenloggers basierend auf einem Xilinx Z-7010 SoC, Bachelor Thesis, FH Technikum Wien, June 2018
[B13]
Patrick Graf, Implementation and Verification of a SoC based Weather Station, Bachelor Thesis, FH Technikum Wien, June 2018
[B14]
Christoph Klinger, Implementation of a Numeric Calculator on an innovative HW/SW Platform, Bachelor Thesis, FH Technikum Wien, June 2018
[M1]
Christopher Reisner, I/O IP Core Design for Embedded Processors, Master Thesis, FH Technikum Wien, June 2017
[M2]
Felix Schrön, I/O PCB Design for an Innovative HW/SW Platform, Master Thesis, FH Technikum Wien, June 2017
[M3]
Kevin Nilles, Entwicklung eines hardwarebasierten modularen Antialiasing- und Texturschaerfungsfilters, Master Thesis, FH Technikum Wien, October 2018